This product is discontinued. It has been replace by the SX10500 Xwire peripheral board
The following table summarizes where various data are located in the memory of the SPice10209 processor.
| Address | Contains | Access with |
|---|---|---|
| 0 & 1 | Channel 1 raw reading |
|
| 2 & 3 | Channel 2 raw reading |
|
| 4 & 5 | Channel 1 filtered rdg |
|
| 6 & 7 | Channel 2 filtered rdg |
|
| 8 | Filter time constant select |
|
| 9 | Status bits | See below |
The status bits are as follows:
| Bit | Meaning | Access with |
|---|---|---|
| 0 | New data available on channel 1. |
|
| 1 | New data available on channel 2. |
|
| 2 | Channel 1 fault |
|
| 3 | Channel 2 fault |
|
The status bits are also accessible via SPice pins, which is usually the easiest way to access them.