SPxTxfrU p

Shift data out of U to the peripheral, and out of the peripheral into U. This provides a raw SPI transfer.

	SPxTxfrU 	p

p is the pin to be used as an enable/strobe and will be defined in the documentation for each peripheral. The instruction transfers V bytes of data from U, starting at U0, to the peripheral, and simultaneously reads back V bytes of data from the peripheral to U and leaves them in V contiguous bytes starting at U0.

For the output bytes, U0 will end up in the peripheral register electrically furthest from the controller board. For the input bytes, the peripheral register electrically closest to the controller board will end up in U0. This means the byte order between inputs and outputs is reversed. The bit order is not reversed.

Clock rate and polarity are as previously set in an SPxMode instruction.

This is a low-level instruction associated with the SPLat Expansion Framework. You will most likely never need to know how to use it unless you need to implement systems with more than about 70 I/O points. There is also a tutorial on SPiceX.

This instruction is not available on any 32-bit boards prior to Dialect 30, and will only be available on those few boards that explicitly implement it.