ShadowClear mm*+,cc

Clear (write 0 to) a region of cc bytes of non-volatile shadow memory starting at address (location number) mm. Data in the shadow memory is retained even when the power goes off.

The R register will be set to 0 if the clear operation is successful. It will be set to 1 if the clear fails.

Caution: If the start address mm plus the count cc add up to an address beyond the end of RAM, the board will generate a fatal runtime error and reset.

Notes (see the product documentation for your specific board for details):

The shadow memory has a finite endurance. A shadow memory location will wear out after a certain number of write or clear operations.
This instruction takes a comparatively long time. During that time the SPLat processor is doing nothing and may miss fast input and will not service timers.

This instruction can be used in indexed mode, i.e. iShadowClear.

+ From dialect 16 the address argument will be jndexed when executed inside a MultiTrack task and will be indexed if the instruction is preceded by the IasJ: precode.

Note that the index or jndex offset is I or J single bytes. This can produce unexpected results if you are clearing for example jndexed floating point data.

Shadow memory is not affected by downloading a new program to the controller. That means any user setup parameters (for example) will remain unchanged. That represents both an advantage and a risk. If you change your program or we change the way we allocate RAM (defBYTE etc) you could have problem, because suddenly your parameters are no longer at the expected addresses. You should therefore consider using absolute RAM addresses (mEQU) to allocate RAM to user parameters.

Dialect exclusions: Not available in dialects before 10.