================= == Version 4.9 == ================= 14 July 2021 - Rebuilt with updated VM: - Modified I2C EEPROM clock line configuration for F3 and F4 processors from open-drain with no pull-up to push-pull, as we do not use a multi-master configuration in any product. - Added beep when a button is pressed, but only if none are pressed before. - Increased allowable Modbus message length from 125 to 253 to allow more registers to be sent at once with the available buffer size. - Added commands to implement indexed CRCs, whereby a user can run up to 5 CRC implementations at a time. - Added hooks in all currently-used device types to run CRC calculations on all transmitted bytes. - Added maths functions. - CRC16 init value define added. - Added utility function to check and convert numbers incorrectly converted by FloatMem16S. - Updated source code for FloatMem16S to convert numbers correctly. - Modified PWM driver code to cope with inverse outputs correctly. - Modified STM32 F4 register allocation to allow PWM signals to be generated on the N outputs on port E. - Turned off VBUS sensing code as it doesn't seem to affect normal operations and allows the VBUS pin to be used for other things. - boolean VM_oSPLatLinkConnectivity(void) function is added to splat_vm.c - Changed checking of pin reset reason in resetInit function before checking standby. - Updated SPX code for CPU. - Modified System source files so their ARM_vCrash calls can be trapped. - Added code to handle a Modbus ReadInputRegisters command, faking it to read the RAM. - Added code also to read and write addresses in the 4000 range and the 5000 range, faking them as RAM locations. - Modified order of reset condition testing so watchdog would have first priority. - (System) Added magnitude checking when sending the LSB of an analog value over SEXI - Also removed a warning from the VM LCD code. - Added SPxChOut instruction to generate a CRC16. Load U with the data, V with the length, then issue a CPU SPxChOut command with code 0 for 16 bits and 1 for 24 bits. Results start at U[1] - System Update (STM32 F4 family): Extended GPIO map to include ports F,G and I, which are only available on the larger devices. - System Update: Added STM32F405ZGT as a target processor (same includes as the 407) - Changed 256-instruction limit to be 1024 instructions, as the 32-bit code is about 10 times faster than the 8-bit code where this limitation was introduced. - (System LCD Driver) Corrected order of returned values from GetCurYX poll so that the correct Y value would be returned. For some reason, the compiler swaps bytes 2 and 0 of the assignment. - (System) Implemented signed version of byte-sized display routines (OBLCD_SDecDispMFW, OBLCD_SDecDispMVW, OBLCD_SDecDispXFW and OBLCD_SDecDispXVW) - (System) Modified SPxPoll2 4,'C000 (Write to buffer location) to update the output immediately if it is changed. - Changed order of LCD initialisation to ensure the buffer is cleared after the CGRAM is set. - Moved 50us delay into LCD_vWriteByte to ensure every command includes an appropriate delay. - SPLat/OS: Modified LCD driver code to minimise the chance of multiple threads writing to the LCD at the same time. - Added code to implement OBLCD_GetCurYX - Added 4KB Battery-Backed NVEM page 3 - SetCursor or SetCursorYX now outputs the new position to the display immediately if the cursor is on. - Added framework code behind the SPiceX calls: SPiceConfigU, SPxTxfrU and SPxMode. - Added SPxCmd2 command to write a byte to a specified LCD buffer location. Command format is SPxCmd2 2,address with U[0]=offset and U[1]=byte. - Added SPxPoll1 function to LCD VM so it could: - Read a character from the LCD buffer at a nominated position; - Read the current brightness (also available via the CPU). - (System) Increased U part of UV register array from 21 bytes to 251. - System: Added new allowable baud rate value of 15626 (offset 13), specifically for the RFID device. - (System/VM): Added new function to enable setting just the receive call-back function. - SetCursor or SetCursorYX now outputs the new position to the display immediately if the cursor is on. - Added framework code behind the SPiceX calls: SPiceConfigU, SPxTxfrU and SPxMode. - Debugged OBCA code: The problem was that the SPLat code was mistakenly setting the mode to OFF. - Modified registers for TIM8-12 to the correct polarity/enable settings. - System Clarification: Changed OBCA Read command names to indicate Poll4 instead of the incorrect Poll1. - Utils: Added 32-bit version of bit reversal code just to complete the set. - Added SPxPoll1 function to LCD VM so it could: - Read a character from the LCD buffer at a nominated position; - Read the current brightness (also available via the CPU). - Also added macro paste commands to the utilities. - Added PWM resynchronise function and a call thereto. - STM32: created PWM measurement driver - VM: If the first output in a call to OutputM didn't exist the controller would correctly reset but incorrectly not report the error to SPLat/PC. - VM: UVtoNV wasn't working right as it was ignoring the "offset", so now modified for use in ARM meaning V must be explicitly set, it won't use NVRecLen to allow for a more flexible instruction. - VM: added generic module for driving outputs as either analogue or digital - VM: added support for OBLCD_HGraph, OBLCD_CursorOff, OBLCD_CursorOn, OBLCD_CursorBlink. These also work over Xwire, both as master and as slave. - OS: ANALOGUE_OUTPUT now includes an INVERTPWM parameter, so fAnOut 0.0 means maximum. - VM: comms profile 5 was 8bits, odd_parity, 2stop but should have been no_parity as per MODBUS standards - SPLat/PC is now able to connect via TTL serial to ARM boards on the first attempt. - The STM32F4 I2C EEPROM driver had an edge case where sometimes it wouldn't send a NAK when reading from NVEM1, this meant the EEPROM sometimes held the SDA line low and caused the F4 to flag a BUSY condition & reset the VM. - SPLatOS: AIO_oReadVref now returns a normalised value, unscaled as some boards may use 3.4V rather than 3.3. - VM: relay driver can now invert the PWM signal, for those times it's connected to an inverting input. - VM: reading the internal analogue reference via a float (ie in the VM) now returns a normalised number based on the ST factory calibration value (multiply by 3.3 to get Vcc) - ARM ST: added generic speaker driver for ST parts, this required a large structural change to the analogue output module (both PWM & DAC) - VM: floatFromU was not working correctly for negative numbers. - VM: OBLCD_Dim may now be used without throwing an error on boards that only support a virtual LCD, it is simply ignored. - STM32F4: can now read the 3V3 rail - VM: A race condition existed in the QuadratureCounter that could cause wrong readings to be returned, often this was seen when moving backwards with the count being returned as a large positive number rather than a small negative number. Thanks to Michael B for spotting this. - VM: ARM controllers now support UVtoNV for NVEM page 1 and up. - VM: ARM based OBQC_fGet used to return 0 thru 16777215, but this meant moving backward from 0 would cause a jump to 16777215. So now it returns negative, which is the same as 8bit SPLat controllers. - VM: YieldTask may now be called in single tasking mode without throwing en error. This is especially useful in subroutines which may be shared by both single and multi-tasking applications. - Setting the NV pointer no longer checks for OOB, it now only check to ensure the pointer is < 0xFFFF. This means the PTR can be set and page chosen in any order. The check for NVOOB is done only when reading/writing NVEM. - VM: stop I/O messages during app upload - ARMF4: tweaked NVEM1 EEPROM driver following field reports of unreliability. Esp for reading, it will now try a few times to address the chip and will report read failures. - VM: generic RAM module, WIP - VM: Oh dear, RTCDateToUV, RTCDMToUV, RTCHHMMToUV, RTCHHMMSSToUV were all incorrectly using the _current_time_ rather than the values in the RTC registers. So functions like OBLCD_HHMMSS were displaying the current time rather than the time in the RTC registers. ================= == Version 4.8 == ================= dt16_1408_release_v4-8 11 August 2017 - VM: the delay between a slave receiving and replying was to quick causing legacy controllers to miss the response, increased to around 500us. - DT16: default SEXI app now supports address change on the fly and auto detect of TTL/485 ports. - DT16, SEXI app timeout increased to 1 second - VM: Fixed InputOM that was returning wildly incorrect values. - NVEM may now report SPxNoResp instead of NVEMPtrOOB if there's a problem communicating with an external EEPROM - Xwire: the Xwire slave thread could run out of stack and cause a reset - ARM: fixed a reset that could occur if Xwire Slave was restarted when it & MODBUS Slave were operating simultaneously. - ARM: WarmBoot now doesn't cause an error, it just restarts the VM. This is the same behaviour as the 8bit controllers. - ARM: SEXI was incorrectly calculating the output size limit, so a value of 37 outputs which is legal was throwing a "too big" error. - VM: floatFromU and fixToU were corrected to treat W as big endian when transferring between U - ARM STMicro boards: If MODBUS was set to 8 data bits even parity, a 0x00 would cause a LIN break and resulted in the packet being dumped resulting MODBUS errors (typically no response if the SPLat is a MODBUS slave). - VM: sometimes a controller running MODBUS would reset when SPLat/PC connected due to an incorrect method of mutex release when closing the MODBUS port. - ARM: a 16bit and 24bit ID is now available on all ARM boards. These are a CRC of a bigger ID so there's a small chance two controllers may have the same ID (chance is obviously less with the 24bit version). - SPLatVM: MemToUV and UVToMem were ignoring the u[n] offset and always starting from u[0]. ================= == Version 4.7 == ================= dt16_1408_release_v4-7 12 Sep 2016 - VM: fixed a serious bug in fSTTimeSince & STTest that 2 days after the controller is turned on made both functions think the elapsed time is always greater than 167772.16s. - ARM: The SPLat/VM on ARM boards was throwing a RAM OutOfBounds error when trying to access byte 250 which is actually the legal last address. ================= == Version 4.6 == ================= dt16_1408_release_v4-6 16 Aug 2016 - DT16: production test now uses HMI430 - VM: Doing a fGetTimer or Test quickly after starting a timer may sometimes have caused the timer to expire immediately. - VM: WtoU, QtoU, UtoW, UtoQ, fixToU, floatFromU, would incorrectly error when loading a float into U[16+] - VM: WaitOnKT wasn't working (incorrect opcode length) - OS: OBLCD now returns a SeqCount whenever the buffer has changed so the caller can refresh only when necessary. - VM: GoIfInOn/Off/K were ignoring "J" ================= == Version 4.5 == ================= 11 Apr 2016 - VM: Fixed STTest which was not working correctly due to a typo. It was especially worse with small delays. - VM: NVReadRec & NVWriteRec were incorrectly expecting a 16 bit address but it's only an 8 bit address. - OS: STM32F4 devices now increase the nof analogue samples/clock to increase accuracy - VM: A change to detect duplicated slave entries in the Xwire table was preventing correct parsing of the table, meaning slaves often weren't being added to the I/O map. - OS: Saw the 1 second timer getting delayed, manifested by ComTestStartTimer taking 13 seconds dignal rather than 10. Due to timers being deleted before the next timer was fetched. - VM: ComTestStartTimer now using fast tick to avoid expiring after 9 - 10 seconds (only following RUN from SPLat/PC, power on was always 10s). - VM: XwireGetPollCntr now increments as soon as a packet is received rather than at the start of sending the response, this also fixed a problem where poll count was not incrementing if the slave had no data to return; interpacket time delays have been shortend to increase throughput. - DT16: new SEXI app with twice the performance. Requires firmware 4.5. - VM: Fixed display of PermStore values in the "Module" window in SPLat/PC as all bytes were off by 1, thus the first byte was always missing and the "status" was never correct. - VM: the Xwire LCD master now sends zeroes for the command bytes (blink, etc) otherwise sending these bytes sent garbage and stuffed up the LCD. - VM: SEXI was not working when analogue I/O didn't start at 0 - VM: now able to report analogue I/O when numbering doesn't start at 0 - SPLatVM: SEXI was not turning off blinking outputs when SPLat/PC connected - SEXI: a duplicate slave entry in the Xwire table now doesn't incorrectly increase the nof I/O's; - VM: More than 10 analogues, in or out, are now correctly sent to SPLat/PC. - VM: Now ensure countdown timers are cleared on VM reset ================= == Version 4.4 == ================= 21 Aug 2015 - DC216, DT16, DA8 now all support USB - VM: loss of SPLat/PC will now stop I/O update messages from being sent. - VM: SEXI was not receiving any _additional_ buffer from the slave device. - VM: draft of support for OBCB instructions - STM32F4 boards: fixed a crash that would sometimes occur when connecting SPLat/PC. Due to CCM-RAM not being initialised and nVM_vDeregistered() trying to kill a bogus thread pointer. - VM: fixes to Xwire slave LCD, esp when LCD isn't 20x4. - VM: An ARM based controller running as an Xwire slave can now display LCD text broadcast from a Master Xwire controller. - VM: A SPLatLink "Get" was returning 1 byte less than it should. ================= == Version 4.3 == ================= 03 Jul 2015 - DT16: CPU is now secured and the user application can't be read out via JTAG - SPLatVM: Fixed "Not" which was converting 0 to 1 but should have been and is now converting it to 255. This bring ARM boards in line with HC08 boards. - OS: If, for example, EP0 requested a 16byte response, some EP0 functions were sending 8 + 8 + 0 which is wrong as was causing the STM32F4 to send the zero length packet as parts of the response to the next request. - ARM: fGoIfPos was getting confused by a -0.0, changed it and fGoIfNeg to use the signbit macro. - VM: A recent fix for Xwire caused a regression in Xwire Master that caused it to access a NULL func ptr for XwirePhys when starting Xwire. - fixed a regression in _iiPrintXXX when printing to RAM where the printing would begin at the second byte. - Xwire: XwirePhys can now be done before starting Xwire - ARM: STM32 serial port lines weren't being correctly configured, the DR8 Xwire & RS485 ports weren't working; Changing interface no longer resets the port, it now just notifies the app and let's it do whatever it needs to. - SEXI: All digital I/O's have been compacted so there are no unused lines. This means the Xwire table is now actual number of I/O's rather than blocks of 8. - ARM VM: Permstore was not being correctly erased on program download and instead was returning a status of "success" but with all 0 bytes. - The SEXI protocol could incorrectly report multiple InputK's as it wasn't confirming a change in sequence number from the slave. - ARM: ComRunScript can now be called anytime to change MODBUS master scripts. The current transaction will finish before the new script starts. - fixed MODBUS slave output protection (was using RAM values) - ARM controllers now support MODBUS master - ARM Controllers: Dialect is now 101 for Countdown timer support - SEXI: after 8 tries, a disconnected peripheral will have it's reported inputs set to 0 - ARM dialect now supports legacy timers: The next ARM dialect, 101, will include support for the "legacy timers", aka: Start Stop Test fSetTimer fGetTimer SetTimer - ARM: The maximum Xwire message is now 64 bytes rather than 32 bytes. This has been done to allow the DA8 to work as a SEXI device as it needs 35 bytes. - added MODBUS query attempts - fixed fWtoIEEE and fIEEEtoW in ARM based controllers - Xwire slave was crashing badly, a NULL pointer access. ================= == Version 4.2 == ================= 12 Sep 2014 - First formal release.